Forth Day 2009 Meeting Notes
Compiled by Dave Jaffe
Contributions from Kevin Appert and others
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08:30 |
Coffee and a Chat |
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09:00 |
Welcome - George Perry
George, the SVFIG
Chairman, will offer a few words of welcome and include some announcements
about books and t-shirts. |
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Forth Applications |
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09:10 |
eForth in C - CH Ting
This the by far the
simplest Forth ever written in C. Existing versions of Forth in C were all
complicated because of C language requirements and the underlying operating
system limitations. This implementation is based on a very simple Forth Virtual
Machine written in C, which executes Forth words in a dictionary. This
dictionary is constructed by an eForth metacompiler and inserted into a byte
memory array in C. The Forth Machine can be quite simple, with as few as 31
primitives, or can be optimized to have 256 primitives.
- Slides
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09:40 |
PACE FIG-Forth - David Kilbridge
David
Kilbridge was the implementer of the original FIG-Forth model for the PACE
processor. He will provide a little insight into this processor and his
implementation of the
FIG model on it
in the early days of the Forth Interest Group.
- Slides - 1.1 Mb pdf
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10:00 |
Resurrecting FIG-Forth through Simulation - Eric
Smith
Eric will give a brief review of his work porting PACE FIG-Forth
to his simulated IMP-16 and
eventually to real hardware. He'll then describe the progress he's made since
May. |
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10:15 |
Overview of the Forth Foundation Library - John E.
Harbold
John will discuss code which makes use of the Forth equivalent
of a C++ Class Library. The Forth
Foundation Library (FFL) is a general purpose Forth library whose main
purpose is to make it easier to develop applications. Examples include a Finite
State Machine (FSM) and Dynamic Strings.
- FFL project
site
- Slides - 40.3 Kb pdf
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10:30 |
Break |
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10:40 |
Cheap, Simple, and Functional - Bob Nash
Using
inexpensive hardware and free development tools, professional-quality,
high-performance instrumentation can be designed quickly. This presentation
will describe several of these development environments and show instruments
that have been built with them.
- Handout - 41.5 Kb
pdf
"Here is the paper I presented at Forth Day, sans the first page of the
89051F362 datasheet."
- 8051
with TCP - bare chip $6.35, development board $48.75
- EAGLE Light
Edition - Free CAD software
- gEDA - GPL suite and
toolkit of Electronic Design Automation tools
(used to design
Ronja - a free technology project for
reliable optical data link)
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11:10 |
Icon Forth - Brad Nelson
A picture is said to
be worth a thousand words. Icon Forth replaces traditional Forth words with
images and the dictionary is a collaboratively edited online database.
- Slides
- IconForth
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11:40 |
Discussion of a Native Forth for a NetBook - Sandy
Bumgarner
"Wouldn't it be wonderful to have a cute, inexpensive, and
complete computer that runs only Forth? Ah, nothing but you, Forth, and the
hardware! Such a system could be built with an
ASUS Eee PC and
perhaps other netbooks. Let's talk about it ..."
- MAce Ace Computer
Emulator
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12:10 |
A Moment of Remembrance and Celebration for Dave Boulton
- Sandy Bumgarner and Cousin Bette
- Memorial Card
- Send condolences to:
- Bette Daoust
- bjdaoust -at- vervial.com
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12:30 |
Lunch in Gibbons Grove - Catered by CH
Ting
Adjacent to Terman Engineering Center |
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Forth Engines |
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13:30 |
Forth System on a Programmable Chip - Leon
Wagner
"I will build a
CFV1CORE_ALTERA
System on a Programmable Chip (SOPC) design in the Altera Quartus II
environment, program the design into a Cyclone III FPGA, and then interactively
develop some Forth code to run on the newly instantiated core."
"The
CFV1CORE_ALTERA, available free of charge from IPextreme, is the same V1
ColdFire processor core implemented in Freescale's MCF51QExx devices, but
delivered as an SOPC Builder design optimized for the Altera Cyclone III FPGA.
The V1 ColdFire system bus has been adapted to the Altera Avalon system
interface for the CFV1CORE_ALTERA implementation."
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14:30 |
Venture Forth Toys - Dennis A. Ruffer
"While
working at the IntellaSys Radio and RF division in Colorado, I came up with
some plug-ins for their VentureForth compiler. I will give a brief introduction
to them and explain why I found them to be useful."
- VentureForth
Compiler Plug-ins
- Dennis' Linkedin
profile
- Slides
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15:00 |
Break |
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15:10 |
IntellaSys Hearing Aid Project - Michael
Montvelishsky
The bleeding edge of hearing aid technology is arcane and
counter-intuitive. Michael will pull back the curtain and reveal the secrets
behind the DSP black magic. This may be the most remarkable real-world
application of the IntellaSys SeaForth processor.
- Slides
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15:50 |
New Code on the New Hardware - Jeff Fox
Jeff
will give a live interactive demonstration of the colorForth tethered IDE as
well as take up topics from his
blog and show off this
year's chips. |
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16:30 |
Square Root Routine for the c18 (s40 CPU) - John
Rible
John will discuss his colorforth implementation of a 32-bit square
root routine for the c18 (s40 cpu) and talk about the eForth interface he used
to test it.
- Code - pdf
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17:00 |
Fireside Chat - Chuck Moore
- GA32 32-computer
Chip - poster
- S40 Multicomputer
Chip - poster
- Haypress
Creek Supercomputer
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18:00 |
Adjourn |
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18:30 |
Dinner Banquet
Su
Hong
1039 El Camino Real
Menlo Park
650/323-6852 |
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Other items:
- Forth
- Software
- Hardware
- Books
- Other
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